Semiconductor device



FIG. 1 is a top, front, and right perspective of a semiconductor device showing my new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom plan view; and,

FIG. 6 is a right side elevational view, the left side elevational view being a mirror image thereof.

The broken line showing of the environment is for illustrative purpose only and forms no part of the claimed design. 

The ornamental design for a “semiconductor device”, as shown and described. 